Product Summary

The 74F280D is a high-speed parity generator/checker that ac-cepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output.

Parametrics

74F280D absolute maximum ratings: (1)Storage Temperature: -65℃ to +150℃; (2)Ambient Temperature under Bias: -55℃ to +125℃; (3)Junction Temperature under Bias: -55℃ to +175℃; (4)Plastic: -55℃ to +150℃; (5)VCCPin Potential to Ground Pin: -0.5V to +7.0V; (6)Input Voltage: -0.5V to +7.0V; (7)Input Current: -30 mA to +5.0 mA; (8)Voltage Applied to Output in HIGH State (with VCC-0V), Standard Output: -0.5V to VCC; TRI-STATE Output: 0.5V to +5.5V; (9)Current Applied to Output in LOW State (Max): twice the rated IOL(mA); (10)ESD Last Passing Voltage (Min): 4000V.

Features

74F280D feature: Guaranteed 4000V minimum ESD protection.

Diagrams

74F280D block diagram

74F219PC
74F219PC

Fairchild Semiconductor

RAM Miscellaneous 64-Bit Ran Acces Mem

Data Sheet

Negotiable 
74F219SC
74F219SC

Fairchild Semiconductor

RAM Miscellaneous 64-Bit Ran Acces Mem

Data Sheet

Negotiable 
74F219SCX
74F219SCX

Fairchild Semiconductor

RAM Miscellaneous 64-Bit Ran Acces Mem

Data Sheet

Negotiable 
74F219SJ
74F219SJ

Fairchild Semiconductor

RAM Miscellaneous 64-Bit Ran Acces Mem

Data Sheet

Negotiable 
74F2240QCX
74F2240QCX

Fairchild Semiconductor

Buffers & Line Drivers Octal Buf/Line Drv

Data Sheet

Negotiable 
74F219SJX
74F219SJX

Fairchild Semiconductor

RAM Miscellaneous

Data Sheet

Negotiable